These new synchronization extensions (Intel TSX) are useful in shared-memory multithreaded applications that employ lock-based synchronization mechanisms.

In a nutshell, Intel TSX provides a set of instruction set extensions that allow programmers to specify regions of code for transactional synchronization.

According to Intel, with transactional synchronization, the hardware can determine dynamically whether threads need to serialize through lock-protected critical sections, and perform serialization only when required.

From what we know at this point in time, the new TSX instruction set will be supported by all processors based on the Haswell architecture.

Haswell is the code name used by Intel for Ivy Bridge’s successor and this is expected to be launched in March-June 2013.

Compared to their predecessors, the chips will feature higher IPC performance, support for the AVX2 instruction set, and will also receive DirectX 11.1 support.

With the introduction of Haswell, Intel plans to split its product range into two distinct groups.

The first group includes the company’s desktop and notebook processors, while the latter is specially designed for Ultrabooks, and drops the usual 2-chip platform approach that Intel has been using for quite some time in favor of a system-on-a-chip (SoC) design.

Desktop CPUs will feature either two of four processing cores with TDPs of 35, 45, 65 or 95 Watt, and will include a dual-channel DDR3/DDR3L memory controller, as well as GT2 or GT1 integrated graphics cores.

Mobile chips will be available in the same dual or quad-core configurations, but pack the more powerful Intel GT3 GPU, while the memory controller only supports DDR3L DIMMs. More info about the TSX instruction set is available here.